24LC04B-I/SN Microchip Technology EEPROM x8 – V datasheet, inventory, & pricing. Single supply with operation down to V for. 24AA04 devices, V for 24LC04B devices. • Low-power CMOS technology: Read current 1 mA, typical. The Microchip Technology Inc. 24LC04B/08B is a 4K or .. Products supported by a preliminary Data Sheet may have an errata sheet describing minor.
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Clock Frequency 24AA04 1. Therefore, if the previous access. SDA is a bidirectional pin used to transfer addresses.
24LC04B-I/ST – Microchip – PCB Footprint & Symbol Download
The master then issues the. Address Pointer is set. There dataheet three basic types. Once the word address is sent, the master generates a. Read operations are not affected. The 24XX04 also has a page write capability for up to 16 bytes of data. Sequential reads are initiated in the same way as a. The master will not acknowledge the transfer, but does generate a Stop condition and the 24XX04 discontinues transmission Figure The device is organized as two blocks of x 8-bit memory with a 2-wire serial interface.
24LC04B Datasheet PDF
Pointer allows the entire memory contents to be serially. This is accomplished by sending the word address to the 24XX04 as part of a write operation. Low-voltage design permits operation down to 1.
This directs the 24XX04 to transmit the next sequentially- addressed 8-bit word Figure The descriptions of the pins are listed in Table Ranges I I, E Features: Changes during Datssheet high are. The Chip Scale package does not support the write- protect feature.
The SCL input is used to synchronize the data transfer. This termi- nates the write operation, but not before the internal Address Pointer is set. datashert
If tied to V SSnormal memory operation is enabled. This is accomplished by sending the word. For normal data transfer, SDA is allowed to change.
To provide sequential reads, the 24XX04 contains an internal Address Pointer that is incremented by one upon completion of each operation.
To perform this type of read operation, the word address must first be set. Since it is an open. The 24XX04 also has a page write. CS Chip Scale 2. Read operations are initiated in the same way as write. If tied to V CCwrite operations are inhibited. Bus Activity T Control. The master will not acknowledge. Upon receipt of the slave address. 24kc04b the word address is sent, the master generates a Start condition following the acknowledge.
To provide sequential reads, the 24XX04 contains an. Random read operations allow the master to access. The 24XX04 will then issue an acknowledge and transmit the 8-bit data word.
The entire memory will be write-protected. This Address Pointer allows the entire memory contents to be 24lc044b read during one operation. datashet